Supermicro X10SRL-F Manuale Utente Scaricare il pdf (Pagina 62)

2-36

X10SRL-F User’s Manual

BIOS LICENSE

IPMI CODE

MAC CODE

BAR CODE

DESIGNED IN USA

1.01Rev:

X10SRL-F

1

+

LAN

CTRL

LAN

CTRL

BMC

JP3

JTPM1

JF1

JD1

T-SGPIO1

T-SGPIO2

T-SGPIO3

JOH1

JL1

JPME2

JWD1

JPG1

JPB1

JI2C2

JI2C1

JBR1

JPL2

JPL1

JVR1

JSD1

JSD2

JIPMB1

JPWR1

UID LED - LE1

LE2

LEDM1

JBT1

BT1

FAN4

FAN1

FAN2

FAN3

FANA

FAN5

J24

JPI2C1

JSTBY1

S-SATA3

I_SATA4

I-SATA0

I-SATA1I-SATA2

I-SATA3

S-SATA0

S-SATA1

S-SATA2

I-SATA5

SP1

CPU

CPU SLOT5 PCI-E 3.0 X8

CPU SLOT4 PCI-E 3.0 X8(IN X16)

USB0/1

DIMMC2

USB8/9

USB6/7

USB2/3(3.0)

LAN1

DIMMA2

DIMMA1

USB10(3.0)

LAN2

USB4/5

CPU SLOT2 PCI-E 3.0 X4(IN X8)

PCH SLOT1 PCI-E 2.0 X4(IN X8)

COM2

COM1

DIMMB2

DIMMB1

DIMMD2

DIMMD1

IPMI_LAN

UID - SW

5V STBY

USB11(3.0)

IPMI

VGA

CPU SLOT7 PCI-E 3.0 X8

DIMMC1

CPU SLOT3 PCI-E 3.0 X4(IN X8)

CPU SLOT6 PCI-E 3.0 X8(IN X16)

Intel PCH

1

1

A. BMC Enable/Disable

A

BMC Enable/Disable (JPB1)

JPB1 is used to enable or disable

the BMC (Baseboard Management

Control) chip and the onboard IPMI

connection. This jumper is used to-

gether with the IPMI settings in the

BIOS. After the BMC is disabled,

IPMI health monitoring and remote

management functions are no longer

supported. This jumper is for debug-

ging only. See the table on the right

for jumper settings.

The BMC supports two Universal

Asynchronous Receiver/Transmitter

(UART) ports. These high-speed ports

include a 16-byte send/receive FIFO,

a programmable baud rate generator,

complete modem control capabil-

ity and a processor interrupt system.

Both UARTs provide legacy speed

with baud rate of up to 115.2 Kbps as

well as an advanced speed with baud

rates of 250 K, 500 K, or 1 Mb/s, which

support higher speed modems.

BMC IPMI Enable/Disable

Jumper Settings

Pin # Denition

1-2 Enabled (Default)

2-3 Disabled

1 2 ... 57 58 59 60 61 62 63 64 65 66 67 ... 128 129

Commenti su questo manuale

Nessun commento